Physical vapor deposition (PVD) is a frequently used processing technique in the manufacture of integrated circuit chips that involves the deposition of a metallic layer on the surface of a silicon wafer. The technique is also known as a sputtering process. For instance, in more recently developed advanced semiconductor manufacturing technology, the PVD technique is frequently used to deposit metallic layers of TiN as anti-reflective coating or barrier layers.
In a typical PVD process, an inert gas such as argon is first ionized in an electrical field producing a plasma of charged gas particles wherein the particles are attracted toward a negatively charged source (or target). The energy of these gas particles physically dislodges, or sputters off atoms of the metallic target material. Physical vapor deposition is a versatile technique in that many different materials can be deposited by using an RF or a DC power source.
In a typical PVD process chamber 10, as shown in FIG. 1, major components include a stainless steel chamber 12 that is vacuum tight and is equipped with a cryopump 16 which has the capability of reducing the chamber pressure to 10.sup.-6 Torr or lower, a pressure gauge 18, a sputter source or target 20, a power supply (not shown), a wafer holder 26 and a clamp ring 28. The sputter source 20 and the wafer holder 26 are positioned facing each other. The target is a Ti disc when sputtering of TiN is desired. One of such PVD process chamber is the Endura.RTM. 5500 which is commercially supplied by Applied Materials, Inc. of Santa Clara, Calif.
The wafer holder 26 is normally a pedestal of a disc shape. In the top surface 34 of pedestal 26, metal screws 36 are used as wafer support by holding a wafer at the tip 38 of screw 36. This is shown in FIG. 2 and FIG. 2A. FIG. 2 is an enlarged, plane view of the pedestal 26 shown in FIG. 1. The pedestal 26 is generally of a metal disc structure that has a pedestal body 42 mounted to a backing plate (not shown). The screw or pedestal pin 36 are generally of a 8-32 stainless steel screw mounted through a bottom surface 44 of the pedestal body 42. The tip 38 of the screw 36 protrudes the top surface 46 of the pedestal body 42 by a distance of approximately 1 mm. The enlarged, cross-sectional view shown in FIG. 2A indicates a section of a wafer that is supported by tip 38 of the pedestal pin 36. It is seen that the outer periphery of wafer 30 normally extends over the pedestal pin 36 by approximately 1 cm. The pedestal pins 36, normally requires at least two on each pedestal body 42 for the secure supporting of a wafer 30. The pedestal pin 36 allows a gap of approximately 1 mm to be maintained between the wafer 30 and the top surface 46 of the pedestal body 42. Such distance between the wafer and the pedestal top surface is necessary so that a subsequently deposited film, i.e., a TiN layer will not glue the wafer to the pedestal surface. A thin TiN film is normally deposited on top of an aluminum-copper film layer as an anti-reflective coating.
In a typical PVD deposition process, as shown in FIG. 1, plasma cloud 16 is generated by a cascading ionization reaction in which electrons and ion pairs are formed. For instance, when an electron bumps into an argon atom, it forms an argon ion and another electron. The newly formed electron then collides with another argon atom such that a chain reaction or ionization reaction is started.
When electrons bombard the wafer surface 48, it can be charged to a negative voltage higher than 30 volts. The charge distribution or the formation of an electric field is more severe at or near the location of wafer pins 36. When the wafer pin 36 has a sharp tip 38 (or a rough tip surface), arcing can occur at one of the three wafer pin locations. During the occurrence of arcing, a large number of hot electrons are showered on top of the wafer surface which greatly heat up the area on the wafer that the electrons showered on and furthermore, causes damage to the same area on the metal film that has been deposited on top of the wafer. For instance, in the present case, the aluminum-copper film predeposited on the wafer surface can be greatly damaged to produce a roughened surface. The arcing damages the metal film severely to alter the appearance and the electrical properties of the metal film during the IC fabrication.
It is therefore an object of the present invention to provide a wafer holder that does not have the drawbacks or shortcomings of a conventional wafer holder device.
It is another object of the present invention to provide an insulated wafer pedestal that does not require electrically-conductive pedestal pins for supporting a wafer on the pedestal.
It is a further object of the present invention to provide an insulated wafer pedestal that is an electrically-non-conductive wafer support such that arcing on the wafer can be eliminated.
It is still another object of the present invention to provide a wafer pedestal that utilizes at least three spacers made of insulating material for supporting and insulating a wafer on and from a pedestal body.
It is yet another object of the present invention to provide an insulated wafer pedestal that has a pedestal body of essentially a metal disc and at least three spacers made of insulating material for supporting and insulating a wafer on and from the pedestal body.
It is another further object of the present invention to provide a wafer pedestal that has a pedestal body equipped with recessed areas such that at least three spacers of insulating material can be mounted in such recessed areas to provide support and insulation for a wafer positioned on the pedestal body.
It is still another further object of the present invention to provide an insulated wafer pedestal that has a pedestal body equipped with apertures therethrough and at least three spacers of insulating material mounted in said apertures for supporting and insulating a wafer on and from the pedestal body.
It is yet another further object of the present invention to provide a metal deposition chamber that has a wafer pedestal equipped with at least three spacers of insulating material mounted in a top surface of a pedestal body for supporting and insulating a wafer on and from the pedestal body.